I've written Electronic Design Automation (EDA) software for semiconductors in numerous areas:

  • physical design, from transistor level design and layout generation to chip-level placement and routing
  • transistor level analysis and model generation
  • logic synthesis and physical synthesis
  • design rule checking and circuit extraction
  • mask data preparation and scribe frame generation
  • intellectual property (IP) management and tracking

This broad spectrum of EDA work contrasts with most developers, who work in one area their entire career. I know the tools that generate chips and understand the layouts that result.

Rates and case list are available on request.

GDS/GDSII/OASIS Design Data Review

If someone is using your patents or IP, I'll find it wherever it is. No chip is too large, no infringement is too small.

Modern integrated circuit design files can be over 100 gigabytes in size, with billions of polygons on dozens of layers. My knowledge of semiconductor processing and design styles allows me to work comfortably with these files, even when design rule specifications are missing.

Source Code Review/Algorithm Analysis

I've written well over a million lines of code (mostly C/C++) in my career and am experienced in navigating through large programs. I know EDA algorithms, how they are implemented, and how they change over time.

Contents of this Web site Copyright © 2011-2020 by David C. Chapman. All Rights Reserved. Contact me

Joomla Template: from JoomlaShack